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Assembly Language Quick Reference

A condensed reference covering common x86-64 instructions, registers, flags, and addressing syntax for quick lookup.

PracticeBeginner8 min readJul 10, 2026
Analogies

Register Quick Reference

x86-64 provides 16 general-purpose 64-bit registers, each accessible at multiple widths: rax/eax/ax/al covers 64/32/16/8 bits respectively of the same physical register, and this sub-register aliasing applies uniformly to rbx, rcx, rdx and, with slightly different byte-naming, to rsi/rdi/rbp/rsp and r8-r15 (e.g. r8, r8d, r8w, r8b). Writing to a 32-bit sub-register like eax automatically zero-extends into the full 64-bit rax on x86-64, a quirk with no equivalent when writing to the 16-bit or 8-bit sub-registers, which merge instead of zero-extending.

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Cricket analogy: Register width aliasing is like a player's stats being tracked simultaneously at Test, ODI, and T20 levels — the same underlying player (rax), viewed through different format lenses (eax, ax, al).

asm
; rax sub-register widths (64/32/16/8 bit)
; rax -> eax -> ax -> al

mov rax, 0x1122334455667788
mov eax, 0x99aabbcc     ; zero-extends into full rax: rax = 0x0000000099aabbcc
mov ax,  0x1234         ; only affects low 16 bits, upper bits of rax unchanged
mov al,  0x56           ; only affects low 8 bits

Common Instructions and Addressing Syntax

Core arithmetic and data-movement instructions form the bulk of everyday assembly: mov dst, src copies data, add/sub perform arithmetic and update flags, cmp subtracts without storing the result purely to set flags for a following conditional jump, and lea dst, [expr] computes an address expression without dereferencing it, often repurposed for fast arithmetic. Addressing syntax in Intel-style assembly wraps a memory reference in brackets: [base + index*scale + displacement], where scale must be 1, 2, 4, or 8 — for example [rbp - 0x8] accesses a local variable and [rax + rbx*4] accesses the element at index rbx in a 4-byte-element array pointed to by rax.

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Cricket analogy: The cmp instruction discarding its result but keeping flags is like a third umpire reviewing a run-out purely to update the decision (out/not out) without changing the actual run count on the board.

AT&T syntax (used by GNU tools like GDB and objdump by default on Linux) reverses operand order and prefixes registers with %: Intel's mov eax, ebx becomes AT&T's mov %ebx, %eax. Use objdump -d -M intel to force Intel syntax if that's what you're used to.

Flags Quick Reference

The EFLAGS register's most commonly checked bits are ZF (zero flag, set when a result is zero), SF (sign flag, mirrors the result's most significant bit), CF (carry flag, set on unsigned overflow/borrow), and OF (overflow flag, set on signed overflow). Conditional jumps combine these differently depending on whether the preceding comparison should be treated as signed or unsigned: je/jne check ZF alone, jl/jle/jg/jge (signed) combine SF and OF, while jb/jbe/ja/jae (unsigned) use CF, making the mnemonic choice — not just the cmp — determine correctness.

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Cricket analogy: ZF being set on a zero result is like a scoreboard showing 'target achieved' the instant the winning run is scored — a single clear binary signal.

Using a signed conditional jump (jg, jl) on values you intend as unsigned, or vice versa, is a classic and dangerous bug: comparing two unsigned 32-bit values where one is 0xFFFFFFFF with a signed jl will treat 0xFFFFFFFF as -1, producing the opposite of the intended result.

  • x86-64 has 16 GPRs, each with 64/32/16/8-bit sub-register views (rax/eax/ax/al); writing eax zero-extends rax, but writing ax/al does not.
  • mov copies data; add/sub perform arithmetic and set flags; cmp subtracts only to set flags; lea computes an address without dereferencing.
  • Intel syntax addressing: [base + index*scale + displacement], with scale limited to 1, 2, 4, or 8.
  • AT&T syntax (GDB/objdump default) reverses operand order and prefixes registers with %.
  • Key EFLAGS bits: ZF (zero), SF (sign), CF (unsigned overflow/borrow), OF (signed overflow).
  • Signed jumps (jl/jle/jg/jge) use SF/OF; unsigned jumps (jb/jbe/ja/jae) use CF — mixing them up is a classic bug.
  • je/jne check ZF alone regardless of signedness, since equality doesn't depend on sign interpretation.

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